YQ2G6965

▪ Flexible 1.8V, 2.5V, 3.3V power-rails
▪ High-performance, low phase noise PLL, <
0.5ps RMS typical phase jitter on outputs
▪ Reference LVCMOS output clock
▪ Four universal output pairs individually
configurable:
- Differential (LVPECL, LVDS or HCSL)
- 2 single-ended (2 LVCMOS in-phase or 180
degrees out of phase)
▪ I/O VDDs can be mixed and matched,
supporting 1.8V(LVDS and LVCMOS), 2.5V, or 3.3V
▪ Redundant clock inputs with manual
switchover
▪ Input frequency range:
– Crystal frequency range: 8MHz to 100MHz
▪ Output frequency ranges:
– LVCMOS Clock Outputs – 1MHz to 200MHz
– LP-HCSL Clock Outputs – 1MHz to 200MHz
– Other Differential Clock Outputs – 1MHz to
300MHz
▪ Programmable crystal load capacitance
▪ Power-down mode
▪ I2C serial programming interface
▪ Available in 4 × 4 mm 24-pin QFN
package
▪ -40° to +85°C industrial temperature
operation applications

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